Clocking Nanocircuits for Nanocomputers
and Other Nanoelectronic Systems
Shamik Das and Matthew F. Bauwens
Nanosystems Group
The MITRE Corporation
7515 Colshire Dr., McLean, VA 22102, USA
{sdas,mbauwens}@mitre.org
Abstract—Prospective performance bounds are determined by
simulation for a class of all-nanoelectronic clocking circuits.
Such nanocircuits could be utilized as on-chip master clocks for
stand-alone nanosystems, as local clocks within nanoelectronic
computers, or as local oscillators in mixed-signal nanoelectronic
applications. Designs and simulation results are presented for
these nanocircuits, which are intended to be manufacturable
using presently available nanodevices and nanofabrication tech-
niques. The results presented here indicate that such clocking
nanocircuits, if built using presently available devices, could
achieve operating frequencies up to approximately 1 GHz for
analog applications and 150 MHz for digital nanoelectronic
systems.
I. INTRODUCTION
There has been much progress over the past several years
in the design and development of nanocomputer systems inte-
grated on the molecular scale [1–35]. In particular, functioning
prototypes for extended nanoelectronic memory systems [30,
34] recently have been demonstrated. These recent results sug-
gest that the fabrication of complex nanoprocessing systems
should be possible in the near future.
Two general approaches are being pursued for the de-
velopment of such systems. The first approach, “hybrid”
CMOS/nano systems, involves the integration of nanoelec-
tronic devices with conventional silicon CMOS technology
[25,27,35]. The second approach has the goal of designing and
fabricating nanocomputer systems composed entirely of post-
CMOS nanoelectronic devices. Over the long run, this second
approach may lead to capabilities that will be more transforma-
tive, especially when considering a range of applications from
high-performance, general-purpose nanocomputing systems to
embedded, special-purpose nanoelectronic circuits. Thus, it is
upo