2008
Chapter-2 L15: "Embedded Systems - " , Raj Kamal,
Publs.: McGraw-Hill Education
1
ADVANCED PROCESSOR ARCHITECTURES
AND MEMORY ORGANISATION –
Lesson-15: DSPs
2008
Chapter-2 L15: "Embedded Systems - " , Raj Kamal,
Publs.: McGraw-Hill Education
2
DSP
λ Advanced signal processor circuits
λ MAC (Multiply and Accumulate) unit (s)─
provides fast multiplication of two operands
and accumulating results at a single address.
λ MAC unit computes fast an expression such
as the following summation. yn = Σ (ai ×
xn−i) where the sum is made for i = 0, 1, 2,
…, N-1. Here i, n and N are the integers, ai is
a coefficient, xj is independent variable or an
input element and yk is the dependent
variable or an output element.
2008
Chapter-2 L15: "Embedded Systems - " , Raj Kamal,
Publs.: McGraw-Hill Education
3
DSP
λ DSP processors invariably have Harvard architecture.
λ Caches are organized in Harvard architecture (separate
I-cache and D-Cache
λ Basic Units: MDR, Internal Bus, Data bus, Address
bus, control bus, Bus Interface Unit, Instruction fetch
register, Instruction decoder, Control unit, Instruction
Cache, Data Cache, multistage pipeline processing,
multi-line superscalar processing for obtaining
processing speed higher than one instruction per clock
cycle, Program counter
2008
Chapter-2 L15: "Embedded Systems - " , Raj Kamal,
Publs.: McGraw-Hill Education
4
Core and Special
Structure units in an
Exemplary DSP,
TMS320C64x DSP
Internal Bus
Instruction
Fetch
Unit
Instruction
Dispatch
Unit
Instruction
Decoder
Unit
Emulation
Unit
Control
Registers
2-Level
Caches
Test Unit
Interrupt
Control
Unit
Control
Logic
Bus
Interface
Unit
Register File
A15
A0
A31
A15
L1
X
X
L1 : ALU Auxiliary Logic Unit
M1: Multiplier Unit
D1 :Divider Unit
Eight 32-Bit
Instruction
RIS Parallelism/
Note: Floating Point Units in C67x
L2 : ALU S2 : Auxiliary
M2: Mul