DIGITAL INTEGRATED CIRCUITS:
A PRACTICAL APPLICATION
REDUCTION OF PROCESSOR
5.1 D Flip-Flops
5.2 R–S Flip-Flops
5.3 T Flip-Flops
BOOLEAN LOGIC NOTATION
ADDERS, REGISTERS, AND
11 PROGRAMMABLE I/O
1 REDUCTION OF PROCESSOR LOAD
Today’s processors can make many calculations in a very short amount of time. Embedded
controllers make many repeated calculations several times a second. In many embedded
controllers, such as an engine control or plant process control, the processor takes several
inputs from outside sources, does some computation with those values, and then takes some
action. This may be in the form of an output to the system, an alarm, or just a log of the
data. The processor’s mathematical calculations can be very time intensive. If accuracy is
required, these calculations must done using several digits, sometimes with floating-point
numbers. To take some of this load off of the processor, a field programmable gate array
(FPGA) may be used.
An FPGA is a device of logic gates. These logic gates can be used to take the place of
the computationally intensive mathematical operations that the processor would normally
perform. For example, a process controller is asked to measure 10 analog inputs every 200
ms. The controller must compute a running average of the last three samples of each input.
Using this average, several multiplication and division computations are made. To offload
the processor, an FPGA could be used to make these repetitive calculations and feed the
results back to the processor.
Mechanical Engineers’ Handbook: Instrumentation, Systems, Controls, and MEMS, Volume 2, Third Edition.
Edited by Myer Kutz
2006 by John Wiley & Sons, Inc.